How to conduct simulation research and design for IGBT and MUR matching technology

Simulation tools and physical models

Computer simulation analysis is an important means for researching semiconductor devices. Due to its characteristics of high efficiency, high precision, high economy, and high reliability, it has attracted much attention. By applying simulation technology, design costs can be reduced, design time can be shortened, and the reliability of power semiconductor circuits can be improved.

In order to study the parameters affecting the matching of IGBT and MUR, SHYSEMI used the ISE simulation software to conduct simulation research on the matching technology of IGBT and MUR. The main simulation research carried out included the following two aspects:

1) Conduct dynamic characteristic simulations using different MURs and IGBTs;

2) Based on the same simulation of IGBT and MUR, change the simulation conditions, such as changing the parasitic inductance of the circuit, the parasitic capacitance and inductance of the package, and the driving resistance, etc.

Dynamic characteristic simulations of different MUR and IGBT

MURA parameters:

• P+ anode surface doping 1.5e16 cm3, junction depth 20 µm;
• N- drift region concentration 6e13 cm3, thickness 120 µm;
• N+ cathode with the highest surface concentration of 5e19 cm3, thickness 50 µm;
• Overall lifetime control, electron lifetime 1e-7 s, hole lifetime 1.6e-7 s.

MURB parameters:

• P+ anode surface doping 5e15 cm3, junction depth 6 µm;
• N- drift region concentration 6e13 cm3, thickness 74 µm, forming a buffer layer N' cathode on the backside of the silicon wafer, where the highest concentration of the buffer layer is 4e16 cm3, thickness 18 µm;
• N+ cathode with the highest surface concentration of 5e19 cm3, thickness 1 µm;
• Overall lifetime control, electron lifetime 7e-7 s, hole lifetime 7e-7 s.

The simulation circuit is shown in Figure 1:

Figure 1 Simulation circuit diagram of IGBT and MUR

The simulation data is shown in Table 1. Based on the simulation data, it can be determined that MURB has better dynamic characteristics of IGBT when matched with IGBT compared to MURA. Therefore, when matching IGBT with MUR, it is necessary to select the appropriate MUR. The external characteristics include: rated voltage, rated current, rated frequency, etc.; device parameters include structure, life control, anode-emitter efficiency control, etc.

Based on the same IGBT and MUR simulation, the simulation conditions were changed.

This simulation used the MURB from the above simulation to consider the changes in parasitic inductance, capacitance, and resistance caused by packaging and driving. The simulation tests mainly included:

1. Adding 13 nH of parasitic inductance to the collector;
2. Increasing the base resistance to 30 ohms;
3. Adding 40 pf of parasitic capacitance between the diode terminals;
4. Increasing the base resistance to 30 ohms and adding 40 pf of parasitic capacitance between the diode terminals;
5. Adding 40 pf of parasitic capacitance between the transistor terminals and adding 10 nH of parasitic inductance to the base (f) Adding 40 pf of parasitic capacitance between the diode terminals, increasing the base resistance to 25 ohms, and adding 10 nH of parasitic inductance to the base.

The circuit parameters of each scheme are shown in Table 2, and the simulation circuit is shown in Figure 2.

Figure 2: Circuit parameters of the changed simulation schemes

Figure 3: IGBT and MUR simulation circuit diagram

The simulation data is shown in Table 3. Based on the simulation data, it can be concluded that under the condition that other parameters remain unchanged:

1) According to the simulation results of a and b, c and d, e and f, it can be concluded that increasing the gate drive resistance will increase the turn-off time of IGBT and increase the loss;

2) By comparing FRD B with a in the first simulation test and in this simulation test, it can be seen that significantly increasing the encapsulation inductance of the emitter will significantly increase the recovery time and turn-on loss of IGBT;

3) According to the simulation results of c and e, it can be concluded that increasing the encapsulation inductance of the base will increase the turn-off time of IGBT and increase the turn-off loss;

4) And from the simulation data of a and c, b and d, it can be concluded that within a certain range, the parasitic capacitance of MUR has little effect on the dynamic characteristics of IGBT. Therefore, reducing the gate drive resistance and reducing the encapsulation parasitic inductance can improve the matching performance between IGBT and MUR.

Table 3 Analysis of the dynamic characteristics of IGBT with changed circuit parameters

Analysis of the semiconductor device simulation environment enables a detailed examination of the structure and various characteristics of the device. It also allows for the establishment of circuit models or hybrid models to observe the device's operation within the circuit, which is crucial for dynamic simulation of the device.