1. Connection materials
Definition: DCA, also known as inverted chip technology, directly installs the chip on the substrate and achieves electrical and mechanical connections through solder bumps or other connection materials.
Driven by both environmental protection and performance, most DCA applications use lead-free alloys on both the substrate side and the chip bump side. This choice is intended to respond to environmental calls and ensure product performance. When DCA is applied to chip packaging, it creates a protective free space between the chip and the substrate, which is essential to prevent MEMS (microelectromechanical systems) components from mechanical damage and contamination.
In the application of non-melted bumps, they are often used as a support structure to maintain the proper distance between the chip and the substrate while ensuring the reliability of the electrical connection.
In addition, in certain scenarios, such as low temperature assembly, some special materials such as nickel bumps with solder caps and gold bumps coated with conductive glue have also been widely used.
2. Assembly problems and protection measures
The assembly process of the chip requires high requirements on the selection of connection materials and assembly process to ensure the performance, reliability and long life of the device.
(1) Protection in the segmentation process
- Sensitivity: After the release step is completed, the chip is extremely susceptible to mechanical damage and contamination, especially in devices containing tiny moving parts.
- Pollution effects: Even tiny particles can seriously hamper the movement of chip components.
(2) Protective measures
- Diamond blade cutting: although commonly used, additional measures should be taken to protect the wafer moving surface.
- Laser cutting and break-cutting: A relatively clean method of cutting, but it still requires protecting the crystal surface.
- Plastic adhesive film: Used to protect the active surfaces of wafers, including double-sided wafers.
- Thin plastic film: Pre-drilled auxiliary holes to prevent material from contacting the MEMS active components.
- UV release tape and photoresist coating: Provide additional protection, most of which are modified versions of standard electronic wafer products.
- Special polymer adhesives: UV-cured and/or debonded, easy to clean, leaving no residue.
3. The necessity of chip binder and packaging additives
In the chip packaging process, selecting the right chip adhesive is crucial for ensuring high-quality packaging, primarily because it must strictly meet the standards of low stress and low pollution. While traditional modified epoxy adhesives can meet some requirements, current technology favors polymer materials with additional advantages.
Silicone resins, known for their ultra-low modulus, are highly favored and have become the preferred material in the chip packaging industry. For instance, Dow-Corning's WL3000 and WL5000 series of silicone-based products are specifically designed for applications requiring low stress, low-temperature curing, and high reliability. These materials have a wide range of applications, not only in conventional chip packaging but also showing significant potential in biochips and integrated circuit (IC) packaging.
Chip packaging technology faces a variety of stringent requirements, stemming from the specific internal environment needs of different chip components. For instance, chips that operate under high-speed vibration must run in a vacuum to ensure precise mechanical movement and avoid interference from inert gas molecules. Conversely, some chips require low humidity or low oxygen environments to maintain long-term performance stability.
In addition to the aforementioned vacuum and low-humidity, low-oxygen conditions, some chip devices require specific additives to function properly. For example, some devices need a high-humidity environment as a lubricant to enhance operational efficiency; others require anti-adhesion substances, which can be liquids, solids, or gases, to prevent unnecessary adhesion between components within the package.
In summary, the complexity of chip packaging lies in the need to not only be familiar with and master the selection and application of key components such as chip adhesives and cover plate sealing materials, but also to deeply understand and skillfully apply various internal additives to meet the unique requirements of different devices. The success of this process depends on a deep understanding of the characteristics of various materials and an accurate grasp of the device's needs.